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VLSI project implementing F = (A + ((B + C + E) · D))^c using NMOS/PMOS layout in Electric VLSI CAD tool. Includes full layout with power/ground routing, verified LTSpice simulation (schematics, waveforms). Perfect for digital design coursework. Clone, open .jelib in Electric, run .asc in LTSpice!

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VLSI-Arithmetic-Function-Layout

VLSI project implementing F = (A + ((B + C + E) · D))^c using NMOS/PMOS layout in Electric VLSI CAD tool. Includes full layout with power/ground routing, verified LTSpice simulation (schematics, waveforms). Perfect for digital design coursework. Clone, open .jelib in Electric, run .asc in LTSpice!

About

VLSI project implementing F = (A + ((B + C + E) · D))^c using NMOS/PMOS layout in Electric VLSI CAD tool. Includes full layout with power/ground routing, verified LTSpice simulation (schematics, waveforms). Perfect for digital design coursework. Clone, open .jelib in Electric, run .asc in LTSpice!

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