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Important Review skippedReview was skipped as selected files did not have any reviewable changes.
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Hardware-in-the-loop (HIL) Test Reporthfp.jsonSkipped by PR selection: no affected boards on this rig. No tests were run. tinyusb.jsonScoped run: 4 board(s) — ch32v103r_r1_1v0, ch32v307v_r1_1v0, ch582m_evt, nanoch32v203. Boards/tests not listed were not run. ✅ 59 passed · ❌ 13 failed · ⚪ 12 skipped · blank not run
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Code sizeBaseline: c0d04a7 (exact) https://github.com/hathach/tinyusb/actions/runs/42163783761 59 builds on 2 boards compared, 0 changed no changes |
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- 🪄 Fix comments: Fix CodeRabbit comments on this PR
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Inline comments:
Review comments at @src/portable/wch/dcd_ch32_usbfs.c:
- Line 622: In the host-to-device EP0 stall path, write the EP0 STALL while the
IRQ remains masked and before calling ep_in_hold(false); then release the hold
before re-enabling the IRQ.
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src/portable/wch/ch32_usbfs_reg.hsrc/portable/wch/dcd_ch32_usbfs.c
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[Medium impact] The PR appears safe to merge; no new actionable issue was found.
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Pushed 304c55c: the IN hold is now released only in the EP0 IN stall, after TX is set to STALL (usbd stalls EP0 OUT first, Still open, needs your silicon knowledge:
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Dismissed because a newer commit was pushed; Greptile will re-review the current head.
hathach
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- The EP0 IN hold set at
src/portable/wch/dcd_ch32_usbfs.c:464is only released by the status ZLP completing,dcd_edpt_stall(EP0)or a bus reset, so a cancelled or abandoned control transfer can leave non-iso IN endpoints parked at NAK until the next SETUP or bus reset. - Nit: stale
(void)rhport;remains in functions that now userhport.
Reviewed the whole change at 4d3bd14: 4 new finding(s) (4 open); open thread claims: 1 confirmed.
Confirmed from existing threads:
- @coderabbitai[bot] on
src/portable/wch/dcd_ch32_usbfs.c:661: In the host-to-device EP0 stall path, ep_in_hold(false) re-arms queued IN packets while EP0 still NAKs, so the EP0 STALL should be written (IRQ still masked) before releasing the hold, otherwise a completing IN packet can make the controller ignore later EP0 tokens and the host times out instead of seeing STALL.
CI: red.
| Board | HIL | Regression |
|---|---|---|
| nanoch32v203 | pass | none |
| ch32v307v_r1_1v0 | pass | none |
src/portable/wch/dcd_ch32_usbfs.c:653: nit: (void)rhport; is stale now that rhport is used.
src/portable/wch/dcd_ch32_usbfs.c:653:rhportis passed todcd_int_disable(rhport)andep_in_claim_begin(rhport, ep). Same leftover at lines 555 and 682.- Impact: cosmetic; it suggests the parameter is unused. Drop the casts.
Update: the stall ordering and the (void)rhport nit are fixed in 304c55c; the abandoned-transfer case stays a known limitation.
| data.ep0_status_dir = (setup->wLength && setup->bmRequestType_bit.direction == TUSB_DIR_IN) ? TUSB_DIR_OUT | ||
| : TUSB_DIR_IN; | ||
| // Done before INT_FG is cleared below: INT_BUSY NAKs every token until then (see ep_in_hold) | ||
| ep_in_hold(setup->bmRequestType_bit.direction == TUSB_DIR_OUT); |
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low: The IN hold can outlive an abandoned control transfer.
src/portable/wch/dcd_ch32_usbfs.c:464: only the status ZLP completing, an EP0 stall or a bus reset releasesep_in_hold(true); a host timeout or cancel triggers none.- Impact: non-iso IN endpoints stay NAKed until the next SETUP or bus reset. Kept as a known limitation, see the PR comment.
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…on CH32V103/V20x On CH32V203 USBFS, an IN transaction completed on any other endpoint during a host-to-device control transfer is taken by the SIE as the status stage: EP0 then gets no handshake at all (not even NAK) until the next SETUP, although EP0's RX/TX control registers are armed correctly. The host abandons the data or status stage after three tries. cdc_msc_throughput hits it on every run because it streams bulk IN as soon as DTR rises, while the host still sends SET_LINE_CODING / SET_CONTROL_LINE_STATE (HIL: nanoch32v203-usbfs "CDC dd read failed"; on Windows the CDC port cannot even be opened). Traced with a USBPV sniffer and an on-target ISR trace: device-to-host requests and OUT traffic on other endpoints are unaffected, INT_BUSY busy-NAKs alone do not trigger it, and bulk data stays intact in both directions. CH32V305 USBFS takes the same sequences without losing EP0. From such a SETUP until its status stage completes (or EP0 stalls, or bus reset), hold the non-iso IN endpoints at NAK and re-arm the ones holding a packet afterwards. The hold is taken in the SETUP ISR before UIF_TRANSFER is cleared, so INT_BUSY covers the window. Enabled for CH32V103 (same HIL failure, intermittent) and CH32V20x only; other parts compile it out.
HIL device/mtp raw early_rejection failed on ch32v103 and nanoch32v203-usbfs (stale container: "expected data block for tid 5, got type 3 tid 4"). The MTP example cancels by stalling both bulk endpoints with a response still loaded on bulk IN; the host's CLEAR_FEATURE(ENDPOINT_HALT) is a host-to-device request, so the hold engages, and dcd_edpt_clear_stall() leaves that cancelled transfer marked valid at NAK. The release re-armed every NAK+valid IN endpoint and so resent the stale packet. Track the endpoints the hold itself NAKed and re-arm only those, still NAK with a packet loaded. Open, stall and clear-stall drop their endpoint from that set with the IRQ masked, so a response they set is never undone by the release.
The hold was enabled for CH32V103 on the strength of a matching intermittent HIL failure (cdc_msc_throughput "CDC dd read failed", 1 of 7 recent master runs). With the hold, the V103 still failed it once and passed on the re-run, so that failure is not shown to share the V20x cause. Keep the quirk to CH32V20x, where it is traced on the wire; V103 builds are unchanged from master again.
usbd stalls EP0 OUT before EP0 IN; releasing the hold on the OUT stall left a window where a parked IN could complete before EP0 IN answered STALL.
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Problem
device/cdc_msc_throughputfails on every HIL run fornanoch32v203-usbfs(CDC dd read failed), whilenanoch32v203-fsdevandch32v307v_r1_1v0-usbfs(samedcd_ch32_usbfs.c) pass.ch32v103r_r1_1v0fails that test intermittently (1 of 7 recent master runs); see Not changed below. On Windows the CDC port of the same firmware cannot even be opened (ERROR_GEN_FAILURE).Root cause
During a host-to-device control transfer, if an IN transaction completes on any other endpoint between the SETUP and the next EP0 stage, the CH32V203 USBFS SIE treats it as the status stage. From then until the next SETUP it gives EP0 no handshake at all, not even a NAK. EP0's RX/TX control registers stay correctly armed (read back in the ISR) and no EP0 interrupt is raised. The host gives up after three tries.
cdc_msc_throughputhits this on every run: it streams bulk IN as soon as DTR rises, while the host is still sendingSET_LINE_CODING/SET_CONTROL_LINE_STATE.Evidence (USBPV wire captures plus an on-target ISR trace, nanoCH32V203, USBFS port):
SET_LINE_CODING, OUT data stageSET_LINE_CODING, status IN (data stage passed with EP2 held)SET_CONTROL_LINE_STATE, status ININT_BUSY) in betweenNot affected:
GET_LINE_CODING), even with up to 11 IN completions on EP2/EP3 in between;INT_BUSYitself works: with the transfer ISR stretched by ~120 µs, every token in the pending window was NAKed. Bulk data stays intact in both directions: 4 MiB IN and 3 MiB OUT carried a running byte counter with 0 breaks.CH32V305 USBFS is not affected. It took 163 host-to-device stages that had IN completions in between, including the exact V203 failing sequence, without losing EP0.
Changes
ch32_usbfs_reg.h: new quirk flagCH32_USBFS_H2D_IN_HOLD, set for CH32V20x only.dcd_ch32_usbfs.c, when the flag is set:UIF_TRANSFERis cleared, soINT_BUSYcovers the window.device/mtpearly_rejectioncaught that.The hold costs bulk IN at most the duration of one host-to-device control transfer (about one or two frames).
Testing
Local bench, Windows host,
cdc_msc_throughput, USBPV capturing the link:Builds (
check_build.py):RHPORT_DEVICE=1, and ch32v307v_r1_1v0 / nanoch32v305 withSPEED=full.Code size (
code_size.py diff, local base):cdc_msc_throughput, before it left the guard): +436 B flash, 0 B RAM, all indcd_ch32_usbfs.c.HIL (CI,
hil-tinyusb (tinyusb.json), b4de529)cdc_msc_throughputmtpusbtestThe first revision broke
mtpearly_rejectionon both boards: its release re-sent a transfer that clear-stall had cancelled. b4de529 fixed it.ch582m_evtfails to flash on the rig, as on master.Not changed: CH32V103
CH32V103 was in the guard at first, because it fails the same throughput test intermittently. With the hold it still failed once and passed on the re-run, so that failure is not shown to share the V20x cause. f0a5b52 dropped it, and V103 builds are identical to master again.
Not tested