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  1. First-stage-ARM-CoreSight-Protocol-Decoder First-stage-ARM-CoreSight-Protocol-Decoder Public

    VHDL

  2. I2C-Master-hw-sw-FPGA-IP-CORE I2C-Master-hw-sw-FPGA-IP-CORE Public

    I2C master hw/sw ip core in quartus on intel de2

    VHDL

  3. RS-232-IP-core-in-VHDL RS-232-IP-core-in-VHDL Public

    Term Project for ELE111 Digital Design

    VHDL

  4. ING303-Systemtenking-og-innovasjon-for-ingeniorar ING303-Systemtenking-og-innovasjon-for-ingeniorar Public

    Semesteroppgave - Typ konseptuell skaping av bedrift, inkluderer mye diagrammer som risikoanalyse, pugh-matrise, design-thinking metoden, osv..